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Espressif Systems /ESP32-C6 /SLCHOST /SLC1HOST_INT_ENA1

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Interpret as SLC1HOST_INT_ENA1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SLC1_TOHOST_BIT0_INT_ENA1)SLC1_TOHOST_BIT0_INT_ENA1 0 (SLC1_TOHOST_BIT1_INT_ENA1)SLC1_TOHOST_BIT1_INT_ENA1 0 (SLC1_TOHOST_BIT2_INT_ENA1)SLC1_TOHOST_BIT2_INT_ENA1 0 (SLC1_TOHOST_BIT3_INT_ENA1)SLC1_TOHOST_BIT3_INT_ENA1 0 (SLC1_TOHOST_BIT4_INT_ENA1)SLC1_TOHOST_BIT4_INT_ENA1 0 (SLC1_TOHOST_BIT5_INT_ENA1)SLC1_TOHOST_BIT5_INT_ENA1 0 (SLC1_TOHOST_BIT6_INT_ENA1)SLC1_TOHOST_BIT6_INT_ENA1 0 (SLC1_TOHOST_BIT7_INT_ENA1)SLC1_TOHOST_BIT7_INT_ENA1 0 (SLC1_TOKEN0_1TO0_INT_ENA1)SLC1_TOKEN0_1TO0_INT_ENA1 0 (SLC1_TOKEN1_1TO0_INT_ENA1)SLC1_TOKEN1_1TO0_INT_ENA1 0 (SLC1_TOKEN0_0TO1_INT_ENA1)SLC1_TOKEN0_0TO1_INT_ENA1 0 (SLC1_TOKEN1_0TO1_INT_ENA1)SLC1_TOKEN1_0TO1_INT_ENA1 0 (SLC1HOST_RX_SOF_INT_ENA1)SLC1HOST_RX_SOF_INT_ENA1 0 (SLC1HOST_RX_EOF_INT_ENA1)SLC1HOST_RX_EOF_INT_ENA1 0 (SLC1HOST_RX_START_INT_ENA1)SLC1HOST_RX_START_INT_ENA1 0 (SLC1HOST_TX_START_INT_ENA1)SLC1HOST_TX_START_INT_ENA1 0 (SLC1_RX_UDF_INT_ENA1)SLC1_RX_UDF_INT_ENA1 0 (SLC1_TX_OVF_INT_ENA1)SLC1_TX_OVF_INT_ENA1 0 (SLC1_RX_PF_VALID_INT_ENA1)SLC1_RX_PF_VALID_INT_ENA1 0 (SLC1_EXT_BIT0_INT_ENA1)SLC1_EXT_BIT0_INT_ENA1 0 (SLC1_EXT_BIT1_INT_ENA1)SLC1_EXT_BIT1_INT_ENA1 0 (SLC1_EXT_BIT2_INT_ENA1)SLC1_EXT_BIT2_INT_ENA1 0 (SLC1_EXT_BIT3_INT_ENA1)SLC1_EXT_BIT3_INT_ENA1 0 (SLC1_WIFI_RX_NEW_PACKET_INT_ENA1)SLC1_WIFI_RX_NEW_PACKET_INT_ENA1 0 (SLC1_HOST_RD_RETRY_INT_ENA1)SLC1_HOST_RD_RETRY_INT_ENA1 0 (SLC1_BT_RX_NEW_PACKET_INT_ENA1)SLC1_BT_RX_NEW_PACKET_INT_ENA1

Description

Description****

Fields

SLC1_TOHOST_BIT0_INT_ENA1

Description****
SLC1_TOHOST_BIT1_INT_ENA1

Description****
SLC1_TOHOST_BIT2_INT_ENA1

Description****
SLC1_TOHOST_BIT3_INT_ENA1

Description****
SLC1_TOHOST_BIT4_INT_ENA1

Description****
SLC1_TOHOST_BIT5_INT_ENA1

Description****
SLC1_TOHOST_BIT6_INT_ENA1

Description****
SLC1_TOHOST_BIT7_INT_ENA1

Description****
SLC1_TOKEN0_1TO0_INT_ENA1

Description****
SLC1_TOKEN1_1TO0_INT_ENA1

Description****
SLC1_TOKEN0_0TO1_INT_ENA1

Description****
SLC1_TOKEN1_0TO1_INT_ENA1

Description****
SLC1HOST_RX_SOF_INT_ENA1

Description****
SLC1HOST_RX_EOF_INT_ENA1

Description****
SLC1HOST_RX_START_INT_ENA1

Description****
SLC1HOST_TX_START_INT_ENA1

Description****
SLC1_RX_UDF_INT_ENA1

Description****
SLC1_TX_OVF_INT_ENA1

Description****
SLC1_RX_PF_VALID_INT_ENA1

Description****
SLC1_EXT_BIT0_INT_ENA1

Description****
SLC1_EXT_BIT1_INT_ENA1

Description****
SLC1_EXT_BIT2_INT_ENA1

Description****
SLC1_EXT_BIT3_INT_ENA1

Description****
SLC1_WIFI_RX_NEW_PACKET_INT_ENA1

Description****
SLC1_HOST_RD_RETRY_INT_ENA1

Description****
SLC1_BT_RX_NEW_PACKET_INT_ENA1

Description****

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data